This invention relates to semiconductor processes for connecting one layer of a semiconductor wafer to another layer of a semiconductor wafer and, more particularly, to a method for reducing the number of photolithographic steps in processes connecting one layer of a semiconductor wafer to an upper layer of the semiconductor wafer.
Semiconductor devices, also called integrated circuits, are mass produced by fabricating hundreds of identical circuit patterns on a single semiconductor wafer. During the process, the wafer is sawed into identical dies or xe2x80x9cchips.xe2x80x9d Although commonly referred to as semiconductor devices, the devices are fabricated from various materials, including conductors (e.g., aluminum, tungsten), non-conductors (e.g., silicon dioxide) and semiconductors (e.g., silicon). Silicon is the most commonly used semiconductor, and is used in either its single crystal or polycrystalline form. Polycrystalline silicon is often referred to as polysilicon or simply xe2x80x9cpoly.xe2x80x9d The conductivity of the silicon is adjusted by adding impuritiesxe2x80x94a process commonly referred to as xe2x80x9cdoping.xe2x80x9d
Within an integrated circuit, thousands of devices (e.g., transistors, diodes) are formed. Typically, contacts are formed where a device interfaces to an area of doped silicon. Specifically, plus typically are formed to connect metal 1 layers with device active regions. Vias typically are formed to connect metal 2 and metal 1 layers. Also, interconnects typically are formed to serve as wiring lines interconnecting the many devices on the IC and the many regions within an individual device. These contacts and interconnects are formed using conductive materials.
The integrated circuit devices with their various conductive layers, semiconductive layers, insulating layers, contacts and interconnects are formed by fabrication processes, including doping processes, deposition processes, photolithographic processes, etching processes and other processes. The term xe2x80x9cphotolithographic processxe2x80x9d is of significance here, and refers to a process in which a pattern is delineated in a layer of material (e.g., photoresist) sensitive to photons, electrons or ions. The principle is similar to that of a photocamera in which an object is imaged on a photo-sensitive emulsion film. While with a photocamera the xe2x80x9cfinal productxe2x80x9d is the printed image, the image in the semiconductor process context typically is an intermediate pattern which defines regions where material is deposited or removed. The photolithographic process typically involves multiple exposing and developing steps, wherein, at a given step, the photoresist is exposed to photons, electrons or ions, then developed to remove one of either the exposed or unexposed portions of photoresist. Complex patterns typically require multiple exposure and development steps.
One ongoing goal of semiconductor design and fabrication is to reduce costs. Cost reduction is essential to ongoing success in the field. One manner of reducing costs is to eliminate or optimize steps in the semiconductor fabrication process. In doing so, it is important to maintain or improve device and process efficiency and effectiveness.
According to the invention, a reduced number of photolithographic steps are performed in a semiconductor process for connecting an upper conductive layer to another layer (e.g., conductive layer, semiconductive layer, insulating layer) of a semiconductor wafer. In particular, a single exposure step and a single development step is performed on a resist layer (together one photolithographic step). In addition, other steps, although not photolithographic steps, are performed to form a connection (e.g., contact, plug, via, interconnect) between the upper conductive layer and the lower layer.
According to one aspect of the invention, a photoresist layer on a semiconductor wafer is partially exposed and developed to remove photoresist down to one depth within a first area and down to a second depth within a second area. To do so, the photoresist first area is exposed to light having a first dosage, while the photoresist second area is exposed to light having a second dosage. The second dosage differs from the first dosage. Such first and second areas are concurrently exposed in the same process step. The first area and second area then are concurrently developed to partially expose the photoresist layer. In particular, the partial exposure removes photoresist within the first area to one depth and removes photoresist within the second area to a second depth. In one embodiment, the second dosage is greater than the first dosage and, correspondingly, the second depth is greater than the first depth.
According to another aspect of the invention, a mask having different transmissivities at different areas of the mask is used. At areas directing light to the first photoresist area, the mask area has one transmissivity. At areas directing light to the second photoresist area, the mask area has a different transmissivity. The mask transmits light at the first dosage for exposing the first area and light at the second dosage for exposing the second area. In one embodiment, the mask is a phase-shifting mask.
According to another aspect of the invention, a semiconductor wafer having a first layer and an overlying insulating layer receives the layer of photoresist over the insulating layer. A first area of the photoresist layer is exposed to light having a first dosage while a second area adjacent the first area is concurrently exposed to light having a second dosage differing from the first dosage. The first area and second area of the photoresist layer then are concurrently developed to remove photoresist within the first area to one depth and to remove all photoresist within the second area. The intermediate result is a first opening in the photoresist layer exposing a portion of the insulating layer. Thereafter, a second opening is defined by etching through the exposed insulating layer within the first opening. Conductive material then is deposited within the second opening and above the first layer to form a contact or other conductive connection between the first layer and a deposited second layer. The second layer is a conductive layer above the first layer.
According to another aspect of the invention, the etching step includes etching the exposed insulating layer within the first opening to a first depth, and etching through the photoresist remaining in the first area and an underlying portion of the insulating layer down to a second depth in the insulating layer. The first depth is greater than the second depth.
According to another aspect of the invention, the first depth is less than the thickness of the insulating layer. Also, the step of etching to the first depth partially defines the second opening, and further includes, after etching through the remaining photoresist, etching the insulating layer within the first opening through to the first layer to complete defining the second opening.
According to various embodiments, the first layer is one of a conductive, non-conductive or semiconductive layer and the second layer is a conductive layer.
One advantage of the invention is to reduce the number of photolithographic steps in a semiconductor fabrication process without compromising device efficiency or effectiveness. These and other aspects and advantages of the invention will be better understood by reference to the following detailed description taken in conjunction with the accompanying drawings.